A large lattice constant semiconductor epitaxially grown on silicon (Si) is a useful preliminary structure for microelectronics applications like III-V integration on Si and for fabricating high mobility devices. Alloys of silicon and germanium (Si--Ge) grown on Si satisfy the lattice constant requirement and have been extensively studied in the past few years. As in all lattice-mismatched systems, heteroepitaxial growth of Si--Ge/Si beyond the critical thickness generally results in the formation of misfit and associated threading dislocations. Most applications do require Si--Ge layers much thicker than that imposed by the critical thickness limit and hence, a variety of techniques have been attempted to circumvent the threading dislocation problem. One of the more successful approaches to fabricate relatively defect free Si--Ge/Si layers is the growth of relaxed graded structures. Totally relaxed Si--Ge layers with low threading dislocation densities have been successfully grown using this technique. The utility of such structures in device applications have also been demonstrated.
Such graded Si--Ge alloy layers grown on silicon substrates can be used to produce high speed field effect transistors (FETs) and as substrates for integration of compound semiconductor (III-V) based optoelectronic devices. The utility of the Si--Ge/Si layers has been proven in the above applications. By grading up to 100% Ge, it is possible to create a high lattice constant semiconductor substrate on a regular Si substrate. Such a structure can be used for growing good quality gallium arsenide (GaAs) layers since its lattice constant is closer to Ge than Si. Thus, it is one way of integrating the optoelectronics of GaAs onto conventional Si substrates.
Growing relaxed graded layers of Si--Ge substrates at approximately 800.degree. C. is known to produce quality layers with low defect densities. Grading up to 100% Ge on conventional on-axis Si(001) substrates, however, results in large surface roughness and a high density of defects such as dislocation pile-ups.
Surface morphology and a controlled defect structure are key issues in utilizing these structures for Si integrated circuits in electronic and optoelectronic applications. The strain fields associated with the misfit dislocations lead to the characteristic cross hatch pattern on the epilayer surface in lattice mismatched heteroepitaxy. For (001) epitaxy, the cross hatch pattern occurs in form of trenches and ridges aligned along the two in-plane &lt;110&gt; directions. The cross hatch pattern has been observed in graded Si--Ge/Si and other lattice-mismatched systems such as In.sub.x Ga.sub.1-x As/GaAs, GaAsP/GaAs, GaAs/Si and Ge.sub.x Si.sub.1-x /Si. It is noted that this cross hatch pattern is very different from the &lt;100&gt; oriented "surface ripples" that are observed in thin elastically strained Si--Ge(001) epitaxial films. Under typical growth conditions, the surface ripples generally have a much shorter wavelength and originate from a thermodynamic equilibrium between surface roughness and misfit-induced elastic strain.
It is known that the root mean square (rms) roughness associated with the cross hatch pattern increases with increase in the final Ge content of the graded Si--Ge layer. Surface roughness can affect carrier mobilities, if very severe like the "surface ripples", and is undesirable for lithographic processes. As will be discussed, surface roughness can also lead to defects such as dislocation pile-ups. Such defects adversely affect the electronic quality of the Si--Ge material and hence the device reliability. It is important to understand the origin and interactions of these defects with the surface morphology, in order to eliminate them or minimize their density.
For relatively low lattice mismatched heteroepitaxy on (001) substrates, growth beyond the critical thickness results in the formation of 60.degree. misfit dislocations that form an orthogonal array along the two in-plane &lt;110&gt; directions at the hetero-interface. These misfit dislocations commonly have an out-of-plane Burgers vector of the type 1/2&lt;101&gt; or 1/2&lt;011&gt;. It is known that 60.degree. dislocations can react under favorable conditions to form edge dislocations with in-plane Burgers vectors of the type 1/2&lt;110&gt;.